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Associate Professor
Phone: +34-981-167000, ext. 1219
E-mail: basilio.fraguela@udc.es |
Research Interests
- Performance evaluation and prediction
- Analytical modeling
- High performance simulation
- Compiler transformations
- Parallel languages
Projects
- Analytical modeling of the behavior of the memory hierarchy
- Servet, a benchmark suite that detects many important hardware parameters.
- HTA, an implementation of a class to express parallelism and locality.
- SESC architectural simulator
- FlexRAM (2001/02)